1. Field of the Invention
The present invention relates to a driving circuit for a sensorless brushless motor. The invention particularly relates to a driving circuit for a sensorless brushless motor which detects accurately a rotational position of a three phase motor by keeping the neutral potential of the three phase motor constant.
2. Description of the Prior Art
FIG. 18 shows a conventional driving circuit for a sensorless brushless motor. In FIG. 18, a terminal voltage compressing circuit 300 receives induced voltages of a three phase motor 10 from terminals U, V, and W and compresses or divides the terminal voltage. A terminal voltage correcting circuit 400 detects the current flowing through the motor 10 via a resistor 108, and corrects the terminal voltage according to the motor current. A position detecting circuit 500 detects the rotational position of the motor. A commutation switching circuit 600 switches a commutation current applied to the motor 10, and turns on or off driving transistors 101-106 in a motor driving transistor circuit 100 to rotate the motor.
In the conventional embodiment shown in FIG. 18, for example, focusing on only the U phase, an output voltage of the upper part of the U phase waveform is saturated, as shown in FIG. 24A. If an output current increases, as shown by U' of FIG. 24B, the bottom of the waveform expands, but the upper part of the waveform does not expand, since the upper part of the waveform is saturated. Therefore, the neutral potential is also shifted downward as shown by the arrow in FIG. 24B. Accordingly, the position of the rotor is detected at a different point. To avoid this difference, the terminal voltage correcting circuit 400 is indispensable.
The operation of the conventional driving circuit of the current sensorless brushless motor is explained using FIG. 18. FIG. 19 shows a detailed circuit of a terminal voltage compressing circuit 300. FIG. 20 shows a detailed circuit of a terminal voltage correcting circuit 400. FIG. 21 shows a detailed circuit of a position detecting circuit 500. FIG. 22 shows a detailed circuit of a commutation switching circuit 600.
A specific construction of the terminal voltage compressing circuit 300 is explained below. FIG. 19 shows only one phase of the terminal voltage compressing circuit 300. The terminal voltage from each terminal of the motor 10 is input to an input terminal 301. The voltage divided by resistors 303 and 305 is output from an output terminal 302, relative to a neutral voltage selected by resistors 304 and 305 connected in series between a power supply 310 and a ground 311. This terminal voltage compressing circuit 300 is arranged to supply an appropriate voltage to an input terminal of the terminal voltage correcting circuit 400. The phase voltages U1, V1, W1 are output from the terminal voltage compressing circuit 300 to the inputs of the terminal voltage correcting circuit 400.
The phase voltages U1, V1, W1 supplied from the terminal voltage compressing circuit 300 are input to the terminal voltage correcting circuit 400 of FIG. 20. The terminal voltage correcting circuit 400 of FIG. 20 includes npn transistors 20-34, a pnp transistor 35, resistors 36-56, and constant current sources 57-60. A U-phase terminal voltage U1 is input to the base of the npn transistor 20, a V-phase terminal voltage V1 is input to the base of the npn transistor 25, and W-phase terminal voltage W1 is input to the base of the npn transistor 30. The base of the pnp transistor 35 is connected to a resistor 108 via a terminal 61. The terminals 62-67 are supplied with correction switching signals for changing the correction of the terminal voltage. The corrected terminal voltages of each phase are output as U2, V2, and W2.
The operation of the terminal voltage correcting circuit 400 is explained below using the drawings. In FIG. 20, the terminal voltage correcting circuit for three phases, U, V, and W, are shown, however, only the U-phase terminal voltage correcting circuit is explained.
Assuming that the terminal 62 and the terminal 63 are at high levels, the collector voltages of the npn transistor 22 and the npn transistor 24 reach 0, so the emitter voltages of the npn transistor 21 and the npn transistor 23 reach 0. Therefore, current does not flow through the resistor 37 or the resistor 40. Accordingly, a current i1 supplied from the constant current source 57 only flows through the resistor 36 (resistance: R1). The voltage at the U-phase output terminal of the terminal voltage correcting circuit 400 is obtained by subtracting the voltage drop of the resistor 36 and the base-emitter voltage (Vbe) of the transistor 20 from the input voltage of the terminal voltage correcting circuit 400 as follows. EQU U2=U1-Vbe-R1.multidot.i1 (1)
Assuming that the terminal 62 and the terminal 63 are at low levels, and the voltage Vir is input to the terminal 61. The collector voltages of the npn transistor 21 and the npn transistor 24 become Vir+Vbe (V), so the emitter voltages of the npn transistor 21 and the npn transistor 23 become Vir. Therefore, the current Vir/R2 flows through the resistor 37 (resistance: R2) and the resistor 40 (resistance: R2), respectively. Accordingly, the current flowing through the resistor 36 becomes the sum of the current i1 supplied from the constant current source 57 and the currents flowing through the resistor 37 and the resistor 40. The voltage at the U-phase output terminal of the terminal voltage correcting circuit is obtained from the formula (2) as follows. EQU U1=U-Vbe-R1.multidot.i1-R1.multidot.Vir/R2 (2)
If the terminal 62 is at a high level and the terminal 63 is at a low level, or the terminal 62 is at a low level and the terminal 63 is at a high level, since a current of Vir/R2 flows through the resistor 37 or the resistor 40, the voltage at the U-phase output terminal of the terminal voltage correcting circuit is obtained from the formula (3) as follows. EQU U2=U1-Vbe-R1.multidot.I1-R1.multidot.Vir/R2 (3)
Therefore, the terminal voltage can be corrected by setting the terminal 62 and the terminal 63 at a high level when the voltage drop must be added (current direction: V.fwdarw.U, W.fwdarw.U). In the meantime, when the voltage drop must be subtracted (current direction: U.fwdarw.V, U.fwdarw.W), the terminal voltage can be corrected by setting the terminal 62 and the terminal 63 to low levels.
When the U-phase is not a current-carrying phase and does not need to be corrected (current direction: V.fwdarw.W, W.fwdarw.V), the terminal 62 may be set at a high level and the terminal 63 may be set at a low level, or vice versa. In the same way, as for the V-phase, when the voltage drop must be added (current direction: U.fwdarw.V, W.fwdarw.V), the terminal 64 and the terminal 65 may be set at a high level, when the voltage drop is must be subtracted (current direction: V.fwdarw.U, V.fwdarw.W), the terminal 64 and the terminal 65 may be set at a low level, and when no correction is necessary (current direction: U.fwdarw.W, W.fwdarw.U), the terminal 64 may be set at a high level and the terminal 65 may be set at a low level, or vice versa.
Furthermore, as for the W-phase, when the voltage drop must be added (current direction: U.fwdarw.W, V.fwdarw.W), the terminal 66 and the terminal 67 may be set at high levels, when the resistance drop must be subtracted (current direction: W.fwdarw.U, W.fwdarw.V), the terminal 66 and the terminal 67 may be set at low levels, and when no correction is necessary (current direction: U.fwdarw.V, V.fwdarw.U), the terminal 66 may be set at a high level and the terminal 67 may be set at a low level, or vice versa. The conducting phases and the terminals 62-67 as described above are supplied with correction switching signals K1-K6 as shown in the timing chart of FIG. 25B. The correction switching signals K1-K6 are generated, for example, in a commutation switching circuit 600 described later.
The position detecting circuit 500 is explained below using FIG. 21. In FIG. 21, the position detecting circuit 500 comprises resistors 70-81, differential amplification circuits 82-84, and comparators 85-87. The corrected U-phase terminal voltage U2 is applied to a non-inverting input terminal of a differential amplification circuit 82 and an inverting input terminal of a differential amplification circuit 83, via a resistor 70, and a resistor 75, respectively. The corrected W-phase terminal voltage W2 is applied to a non-inverting input terminal of a differential amplification circuit 83 and an inverting input terminal of a differential amplification circuit 84, via a resistor 74, and a resistor 79, respectively. The corrected V-phase terminal voltage V2 is applied to a non-inverting input terminal of a differential amplification circuit 84 and an inverting input terminal of a differential amplification circuit 82, via a resistor 78, and a resistor 71, respectively. The inverting input terminals of differential amplification circuits 82, 83, and 84 are connected to output terminals of the differential amplification circuits 82, 83, and 84 via resistors 73, 77, and 81, respectively. Each output terminal of the differential amplification circuits 82, 83, and 84 is connected to non-inverting input terminals of comparators 85, 86, and 87, respectively. Furthermore, the reference voltage Vref is input to the non-inverting input terminals of the differential amplification circuits 82, 83, and 84 and inverting input terminals of comparators 85, 86, and 87. The differential amplification circuit 82 outputs differential amplification signals U2 and V2 around the center voltage Vref. The comparator 85 compares the differential amplification signal with Vref and outputs a position signal BU. By the same process, position signals BW and BV are obtained. These position signals, BU, BW, and BV shown in FIG. 25A, are supplied to a commutation switching circuit 600 in the next stage.
FIG. 22 illustrates a conventional commutation switching circuit 600. In FIG. 22, the commutation switching circuit 600 comprises input terminals 601-603 where position signals BU, BW, and BV are respectively input. The commutation switching circuit 600 further comprises inverters 604-606, AND gates 611-616 and output terminals 621-626. Each of position signals BU, BW, and BV input to input terminals 601-603 is applied to an input terminal of an AND gate as illustrated in FIG. 22. When position signals BU, BW, and BV shown in FIG. 25A are applied, the commutation switching circuit 600 generates driving signals K1-K6 shown in FIG. 25B according to the logic circuit shown by FIG. 22. These driving signals K1-K6 are applied to the driving transistors 101-106 in the motor driving transistor circuit 100 as shown in FIG. 18 to rotate the motor 10.
FIGS. 26A-26C show the timing relationship between the output of the commutation switching circuit 600 and the U-phase output in a conventional motor driving circuit. The U-phase driving signals K1 and K2 generated by the commutation switching circuit 600 are respectively input to the driving transistors 101 and 104. In FIGS. 26A and 26C, when K1 is at logic "L", the current flows through the driving transistor 101 to generate a positive voltage at the U-phase. On the other hand, in FIGS. 26B and 26C, when K2 is at logic "H", the current flows through the driving transistor 102 to generate a negative voltage at the U-phase.
This circuit detects a current flowing through the motor 10 via the resistor 108. However, in the resistor 108, the base currents of the driving transistors 104-106 flow in addition to the current flowing through the motor 10. Therefore, it is impossible to detect a accurate current flowing only through the motor 10. Accordingly, it is inevitable to correct the terminal voltage according to the motor current. Further, it is impossible to detect accurately the position of the rotor since the errors generated in the terminal voltage compressing circuit 300 are added.
Furthermore, since the transistors 101-106 in the motor driving transistor circuit 100 are switched by the rectangular wave voltage applied to the motor 10 for commutation, a spike voltage shown in FIG. 27 is included in the output voltage. When the spike voltage is in the audible frequency band, it causes the audio noise.